DIMM

A DIMM (Dual In-Line Memory Module) is a popular type of memory module used in computers. It is a printed circuit board with one or both sides (front and back) holding DRAM chips and pins.^[1] The vast majority of DIMMs are manufactured in compliance with JEDEC memory standards, although there are proprietary DIMMs. DIMMs come in a variety of speeds and capacities, and are generally one of two lengths: PC, which are 133.35 mm (5.25 in), and laptop (SO-DIMM), which are about half the length at 67.60 mm (2.66 in).^[2]

DIMMs (Dual In-line Memory Module) were a 1990s upgrade for SIMMs (Single In-line Memory Modules)^[3]^[4] as Intel P5-based Pentium processors began to gain market share. The Pentium had a 64-bit bus width, which would require SIMMs installed in matched pairs in order to populate the data bus. The processor would then access the two SIMMs in parallel.

DIMMs were introduced to eliminate this disadvantage. The contacts on SIMMs on both sides are redundant, while DIMMs have separate electrical contacts on each side of the module.^[5] This allowed them to double the SIMMs 32-bit data path into a 64-bit data path.^[6]

The name "DIMM" was chosen as an acronym for Dual In-line Memory Module symbolizing the split in the contacts of a SIMM into two independent rows.^[6] Many enhancements have occurred to the modules in the intervening years, but the word "DIMM" has remained as one of the generic terms for a computer memory module.

There are numerous DIMM variants, employing different pin-counts:

DIMM

100-pin: printer SDRAM and printer ROM (e.g., PostScript)
168-pin: SDR SDRAM sometimes used for FPM/EDO DRAM in workstations or servers, may be 3.3 or 5 V
184-pin: DDR SDRAM
200-pin: FPM/EDO DRAM in some Sun workstations and servers
240-pin: DDR2 SDRAM, DDR3 SDRAM and FB-DIMM DRAM
278-pin: HP high density SDRAM
288-pin: DDR4 SDRAM and DDR5 SDRAM^[7]

SO-DIMM

072-pin: FPM DRAM and EDO DRAM;^[8] different pin configuration from 72-pin SIMM
144-pin: SDR SDRAM,^[8] sometimes used for DDR2 SDRAM
200-pin: DDR SDRAM^[8] and DDR2 SDRAM
204-pin: DDR3 SDRAM
260-pin: DDR4 SDRAM
260-pin: UniDIMMs carrying either DDR3 or DDR4 SDRAM; differently notched than DDR4 SO-DIMMs
262-pin: DDR5 SDRAM

MiniDIMM

244-pin: DDR2 SDRAM

MicroDIMM

144-pin: SDRAM^[8]
172-pin: DDR SDRAM^[8]
214-pin: DDR2 SDRAM

A SO-DIMM (pronounced "so-dimm" /ˈsoʊdɪm/, also spelled "SODIMM") or small outline DIMM, is a smaller alternative to a DIMM, being roughly half the physical size of a regular DIMM. The first SODIMMs had 72 pins and were introduced by JEDEC in 1997.^[8]^[9]^[10] Before its introduction, many laptops would use proprietary^[11] RAM modules which were expensive and hard to find.^[8]^[12]

SO-DIMMs are often used in computers that have limited space, which include laptops, notebook computers, small-footprint personal computers such as those based on Nano-ITX motherboards, high-end upgradable office printers, and networking hardware such as routers and NAS devices.^[13] They are usually available with the same size data path and speed ratings of the regular DIMMs though normally with smaller capacities.

On the bottom edge of 168-pin DIMMs there are two notches, and the location of each notch determines a particular feature of the module. The first notch is the DRAM key position, which represents RFU (reserved future use), registered, and unbuffered DIMM types (left, middle and right position, respectively). The second notch is the voltage key position, which represents 5.0 V, 3.3 V, and RFU DIMM types (order is the same as above).

DDR, DDR2, DDR3, DDR4 and DDR5 all have different pin counts and/or different notch positions, and none of them are forward compatible or backward compatible. DDR5 SDRAM is the most recent type of DDR memory and has been in use since 2020.

A DIMM's capacity and other operational parameters may be identified with serial presence detect (SPD), an additional chip which contains information about the module type and timing for the memory controller to be configured correctly. The SPD EEPROM connects to the System Management Bus and may also contain thermal sensors (TS-on-DIMM).^[14]

ECC DIMMs are those that have extra data bits which can be used by the system memory controller to detect and correct errors. There are numerous ECC schemes, but perhaps the most common is Single Error Correct, Double Error Detect (SECDED) which uses an extra byte per 64-bit word. ECC modules usually carry a multiple of 9 instead of a multiple of 8 chips.

Sometimes memory modules are designed with two or more independent sets of DRAM chips connected to the same address and data buses; each such set is called a rank. Ranks that share the same slot, only one rank may be accessed at any given time; it is specified by activating the corresponding rank's chip select (CS) signal. The other ranks on the module are deactivated for the duration of the operation by having their corresponding CS signals deactivated. DIMMs are currently being commonly manufactured with up to four ranks per module. Consumer DIMM vendors have recently begun to distinguish between single and dual ranked DIMMs.

After a memory word is fetched, the memory is typically inaccessible for an extended period of time while the sense amplifiers are charged for access of the next cell. By interleaving the memory (e.g. cells 0, 4, 8, etc. are stored together in one rank), sequential memory accesses can be performed more rapidly because sense amplifiers have 3 cycles of idle time for recharging, between accesses.

DIMMs are often referred to as "single-sided" or "double-sided" to describe whether the DRAM chips are located on one or both sides of the module's printed circuit board (PCB). However, these terms may cause confusion, as the physical layout of the chips does not necessarily relate to how they are logically organized or accessed.

JEDEC decided that the terms "dual-sided", "double-sided", or "dual-banked" were not correct when applied to registered DIMMs (RDIMMs).

Most DIMMs are built using "×4" ("by four") or "×8" ("by eight") memory chips with up to nine chips per side; "×4" and "×8" refer to the data width of the DRAM chips in bits. High-capacity DIMMs such as 256 GB DIMMs can have up to 19 chips per side.

In the case of "×4" registered DIMMs, the data width per side is 36 bits; therefore, the memory controller (which requires 72 bits) needs to address both sides at the same time to read or write the data it needs. In this case, the two-sided module is single-ranked. For "×8" registered DIMMs, each side is 72 bits wide, so the memory controller only addresses one side at a time (the two-sided module is dual-ranked).

The above example applies to ECC memory that stores 72 bits instead of the more common 64. There would also be one extra chip per group of eight, which is not counted.

For various technologies, there are certain bus and device clock frequencies that are standardized; there is also a decided nomenclature for each of these speeds for each type.

DIMMs based on Single Data Rate (SDR) DRAM have the same bus frequency for data, address and control lines. DIMMs based on Double Data Rate (DDR) DRAM have data but not the strobe at double the rate of the clock; this is achieved by clocking on both the rising and falling edge of the data strobes. Power consumption and voltage gradually became lower with each generation of DDR-based DIMMs.

Another influence is Column Access Strobe (CAS) latency, or CL, which affects memory access speed. This is the delay time between the READ command and the moment data is available. See main article CAS/CL.