Register renaming
technique that eliminates the false data dependencies arising from the reuse of architectural registers by successive instructions that do not have any real data dependencies between them From Wikipedia, the free encyclopedia
technique that eliminates the false data dependencies arising from the reuse of architectural registers by successive instructions that do not have any real data dependencies between them From Wikipedia, the free encyclopedia
In computer engineering, register renaming refers to a technique used to avoid unnecessary serialized execution of program instructions because of the reuse of the same registers by those instructions.
Programs are composed of instructions which operate on values. The instructions must name these values in order to distinguish them from one another. A typical instruction might say, add X and Y and put the result in Z. In this instruction, X, Y, and Z are the names of storage locations.
In order to have a compact instruction encoding, most processor instruction sets have a small set of special locations which can be directly named. For example, the x86 instruction set architecture has 8 integer registers, x86-64 has 16, many RISCs have 32, and IA-64 has 128. In smaller processors, the names of these locations correspond directly to elements of a register file.
Different instructions may take different amounts of time (e.g., CISC architecture). For instance, a processor may be able to execute hundreds of instructions while a single load from main memory instruction is in progress. Shorter instructions executed while the load is outstanding will finish first, thus the instructions are finishing out of the original program order. Out-of-order execution has been used in most recent high-performance CPUs to achieve some of their speed gains.
Consider this sequence of instructions running on an out-of-order CPU:
1.LOAD R1, LOC MEM[1024] 2.R1 = R1 + 2 3.STORE R1, LOC MEM[1024+8] 4.LOAD R1, LOC MEM[2048] 5.R1 = R1 + 4 6.STORE R1, LOC MEM[2048+8]
Instructions 4, 5, and 6 are independent of instructions 1, 2, and 3, but the processor cannot finish 4 until 3 is done, because 3 would then write the wrong value.
How to remove restrictions We can remove this restriction by changing the names of some of the registers, so that the program can be executed faster.
When possible, compilers do this renaming. But compilers are limited by the number of register inside the Central processing unit. Many high performance CPUs have more physical registers than may be named directly in the instruction set and they can rename registers in hardware to achieve better instruction level
Anything that is read and written can be renamed. While the general-purpose and floating-point registers are the most, flag and status registers or even individual status bits are commonly renamed as well.
Memory locations can also be renamed, although it is not commonly done to the level used in register renaming.
When more than one instruction references a particular location for an operand, either reading it (as an input) or writing it (as an output), executing those instructions in an order different from the original program order can cause to three kinds of problems, also known as hazards:
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