Time triple modular redundancy

Time triple modular redundancy, also known as TTMR, is a patented single-event upset mitigation technique that detects and corrects errors in a computer or microprocessor. TTMR allows the use of very long instruction word (VLIW) style microprocessors in space or other applications where external sources, such as radiation, would cause an elevated rate of errors. TTMR permits triple modular redundancy (TMR) protection in a single processor.^[1]

Space Micro Inc developed and patented TTMR. It has been implemented in Space Micro's space qualified single-board computers, such as the Proton200k.

References

1. D. R. Czajkowski, P. K. Samudrala and M. P. Pagey, "SEU mitigation for reconfigurable FPGAs," 2006 IEEE Aerospace Conference, Big Sky, MT, USA, 2006, pp. 7 pp.-, doi: 10.1109/AERO.2006.1655957.

External links

• TTMR Patent