I486
Successor to the Intel 386 From Wikipedia, the free encyclopedia
Successor to the Intel 386 From Wikipedia, the free encyclopedia
The Intel 486, officially named i486 and also known as 80486, is a microprocessor introduced in 1989. It is a higher-performance follow-up to the Intel 386. It represents the fourth generation of binary compatible CPUs following the 8086 of 1978, the Intel 80286 of 1982, and 1985's i386.
 The exposed die of an Intel 486DX2 | |
| General information | |
|---|---|
| Launched | April 10, 1989[1] |
| Discontinued | September 28, 2007[2] |
| Designed by | Intel, with Pat Gelsinger as chief architect |
| Common manufacturer |
|
| Performance | |
| Max. CPU clock rate | 16 to 100 MHz[a] |
| FSB speeds | 16 MHz to 50 MHz |
| Data width | 32 bits[3] |
| Address width | 32 bits[3] |
| Virtual address width | 32 bits (linear); 46 bits (logical)[3] |
| Cache | |
| L1 cache | 8 KB to 16 KB |
| Architecture and classification | |
| Technology node | 1 μm to 600 nm |
| Instruction set | x86-16, IA-32 including x87 (except for "SX" models) |
| Physical specifications | |
| Transistors |
|
| Co-processor | Intel 80487SX |
| Package | |
| Socket | |
| History | |
| Predecessor | Intel 386 |
| Successor | Pentium/i586 (P5) |
| Support status | |
| Unsupported | |
It was the first tightly-pipelined[c] x86 design as well as the first x86 chip to include more than one million transistors. It offered a large on-chip cache and an integrated floating-point unit. When it was announced, the initial performance was originally published between 15 and 20 VAX MIPS, between 37,000 and 49,000 dhrystones per second, and between 6.1 and 8.2 double-precision megawhetstones per second for both 25 and 33 MHz version.[1] A typical 50 MHz i486 executes 41 million instructions per second Dhrystone MIPS and SPEC integer rating of 27.9.[4] It is approximately twice as fast as the i386 or i286 per clock cycle. The i486's improved performance is thanks to its five-stage pipeline with all stages bound to a single cycle. The enhanced FPU unit on the chip was significantly faster than the i387 FPU per cycle. The i387 FPU was a separate, optional math coprocessor installed in a motherboard socket alongside the i386.[5]
The i486 was succeeded by the original Pentium. Orders were discontinued for the i486 on March 30, 2007 and the last shipments were on September 28, 2007.[2]
The concept of this microprocessor generation was discussed with Pat Gelsinger and John Crawford shortly after the release of 386 processor in 1985. The team started the computer simulation in early 1987. They finalized the logic and microcode function during 1988. The team finalized the database in February 1989 until the tape out on March 1. They received the first silicon from the fabrication on March 20.[6]
The i486 was announced at Spring Comdex in April 10, 1989.[1] At the announcement, Intel stated that samples would be available in the third quarter and production quantities would ship in the fourth quarter.[7] The first i486-based PCs were announced in late 1989.[8]
In fall of 1991, Intel introduced the 50 MHz i486 DX using the three layer 800 nm process CHMOS-V technology. They were available for US$665 in 1,000-unit quantities.[9]
In that season, Intel introduced low-power 25 MHz Intel486 DX microprocessor. This one was available for US$471. Also, there were low-power 16, 20, and 25 MHz Intel486 SX microprocessors. They were available at $235, $266, and $366 for these frequency range respectively. All pricing were in quantities of 1,000 pieces. These low-power microprocessors have power consumption reduced by 50–75% compared to similar regular versions of these CPUs.[10]
The first major update to the i486 design came in March 1992 with the release of the clock-doubled 486DX2 series.[11] It was the first time that the CPU core clock frequency was separated from the system bus clock frequency by using a dual clock multiplier, supporting 486DX2 chips at 40 and 50 MHz. The faster 66 MHz 486DX2-66 was released that August.[11]
The fifth-generation Pentium processor launched in 1993, while Intel continued to produce i486 processors, including the triple-clock-rate 486DX4-100 with a 100 MHz clock speed and a L1 cache doubled to 16 KB.[11]
Earlier, Intel had decided not to share its 80386 and 80486 technologies with AMD. However, AMD believed that their technology sharing agreement extended to the 80386 as a derivative of the 80286.[11] AMD reverse-engineered the 386 and produced the 40 MHz Am386DX-40 chip, which was cheaper and had lower power consumption than Intel's best 33 MHz version.[11] Intel attempted to prevent AMD from selling the processor, but AMD won in court, which allowed it to establish itself as a competitor.[12]
AMD continued to create clones, releasing the first-generation Am486 chip in April 1993 with clock frequencies of 25, 33 and 40 MHz. Second-generation Am486DX2 chips with 50, 66 and 80 MHz clock frequencies were released the following year.[11] The Am486 series was completed with a 120 MHz DX4 chip in 1995.[11]
AMD's long-running 1987 arbitration lawsuit against Intel was settled in 1995, and AMD gained access to Intel's 80486 microcode.[11] This led to the creation of two versions of AMD's 486 processor – one reverse-engineered from Intel's microcode, while the other used AMD's microcode in a clean-room design process. However, the settlement also concluded that the 80486 would be AMD's last Intel clone.[11]
Another 486 clone manufacturer was Cyrix, which was a fabless co-processor chip maker for 80286/386 systems. The first Cyrix 486 processors, the 486SLC and 486DLC, were released in 1992 and used the 80386 package.[11] Both Texas Instruments-manufactured Cyrix processors were pin-compatible with 386SX/DX systems, which allowed them to become an upgrade option.[12] However, these chips could not match the Intel 486 processors, having only 1 KB of cache memory and no built-in math coprocessor. In 1993, Cyrix released its own Cx486DX and DX2 processors, which were closer in performance to Intel's counterparts. Intel and Cyrix sued each other, with Intel filing for patent infringement, and Cyrix for antitrust claims. In 1994, Cyrix won the patent infringement case and dropped its antitrust claim.[11]
In 1995, both Cyrix and AMD began looking at a ready market for users wanting to upgrade their processors. Cyrix released a derivative 486 processor called the 5x86, based on the Cyrix M1 core, which was clocked up to 120 MHz and was an option for 486 Socket 3 motherboards.[11][12] AMD released a 133 MHz Am5x86 upgrade chip, which was essentially an improved 80486 with double the cache and a quad multiplier that also worked with the original 486DX motherboards.[11] Am5x86 was the first processor to use AMD's performance rating and was marketed as Am5x86-P75, with claims that it was equivalent to the Pentium 75.[12] Kingston Technology launched a "TurboChip" 486 system upgrade that used a 133 MHz Am5x86.[11]
Intel responded by making a Pentium OverDrive upgrade chip for 486 motherboards, which was a modified Pentium core that ran up to 83 MHz on boards with a 25 or 33 MHz front-side bus clock. OverDrive wasn't popular due to speed and price.[11] New computers equipped with 486 processors in discount warehouses became scarce, and an IBM spokesperson called it a "dinosaur".[13] Even after the Pentium series of processors gained a foothold in the market, however, Intel continued to produce 486 cores for industrial embedded applications. Intel discontinued production of i486 processors in late 2007.[2][11]
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The instruction set of the i486 is very similar to the i386, with the addition of a few extra instructions, such as CMPXCHG, a compare-and-swap atomic operation, and XADD, a fetch-and-add atomic operation that returned the original value (unlike a standard ADD, which returns flags only). This generation CPU has brought up to 156 different instructions listing.[14]
The i486's performance architecture is a vast improvement over the i386. It has an on-chip unified instruction and data cache, an on-chip floating-point unit (FPU) and an enhanced bus interface unit.[15] Due to the tight pipelining, sequences of simple instructions (such as ALU reg,reg and ALU reg,im) could sustain single-clock-cycle throughput (one instruction completed every clock). In other words, it was running about 1.8 clocks per instruction.[6] These improvements yielded a rough doubling in integer ALU performance over the i386 at the same clock rate. A 16 MHz i486 therefore had performance similar to a 33 MHz i386. With the combination both CPU and FPU house in the die would have bus utilization rate of 50% for the 25 MHz Intel486 version.[16] In other words, with the combination of both CPU and MCP (math coprocessor) provides 40% more performance than with both Intel386 DX and Intel387 DX math coprocessor combined.[17] The older design had to reach 50 MHz to be comparable with a 25 MHz i486 part.[d]
Just as in the i386, a flat 4 GB memory model could be implemented. All "segment selector" registers could be set to a neutral value in protected mode, or to zero in real mode, and using only the 32-bit "offset registers" (x86-terminology for general CPU registers used as address registers) as a linear 32-bit virtual address bypassing the segmentation logic. Virtual addresses were then normally mapped onto physical addresses by the paging system except when it was disabled (real mode had no virtual addresses). Just as with the i386, circumventing memory segmentation could substantially improve performance for some operating systems and applications.
On a typical PC motherboard, either four matched 30-pin (8-bit) SIMMs or one 72-pin (32-bit) SIMM per bank were required to fit the i486's 32-bit data bus. The address bus used 30-bits (A31..A2) complemented by four byte-select pins (instead of A0,A1) to allow for any 8/16/32-bit selection. This meant that the limit of directly addressable physical memory was 4 gigabytes as well (230 32-bit words = 232 8-bit words).
Intel offered several suffixes and variants (see table). Variants include:
The maximal internal clock frequency (on Intel's versions) ranged from 16 to 100 MHz. The 16 MHz i486SX model was used by Dell Computers.
One of the few i486 models specified for a 50 MHz bus (486DX-50) initially had overheating problems and was moved to the 0.8-micrometer fabrication process. However, problems continued when the 486DX-50 was installed in local-bus systems due to the high bus speed, making it unpopular with mainstream consumers. Local-bus video was considered a requirement at the time, though it remained popular with users of EISA systems. The 486DX-50 was soon eclipsed by the clock-doubled i486DX2, which although running the internal CPU logic at twice the external bus speed (50 MHz), was nevertheless slower because the external bus ran at only 25 MHz. The i486DX2 at 66 MHz (with 33 MHz external bus) was faster than the 486DX-50, overall.
More powerful i486 iterations such as the OverDrive and DX4 were less popular (the latter available as an OEM part only), as they came out after Intel had released the next-generation Pentium processor family. Certain steppings of the DX4 also officially supported 50 MHz bus operation, but it was a seldom-used feature.
| Model | CPU/bus clock speed | Voltage | L1 cache[e] | Introduced | Notes | |
|---|---|---|---|---|---|---|
   | i486DX (P4) | 20, 25 MHz 33 MHz 50 MHz | 5 V | 8 KB WT | April 1989 May 1990 June 1991 | The original chip without clock multiplier |
 | i486SL | 20, 25, 33 MHz | 5 V or 3.3 V | 8 KB WT | November 1992 | Low-power version of the i486DX, reduced VCore, SMM (System Management Mode), stop clock, and power-saving features — mainly for use in portable computers |
 | i486SX (P23) | 16, 20, 25 MHz 33 MHz | 5 V | 8 KB WT | September 1991 September 1992 | An i486DX with the FPU part disabled; later versions had the FPU removed from the die to reduce area and hence cost. |
 | i486DX2 (P24) | 40/20, 50/25 MHz 66/33 MHz | 5 V | 8 KB WT | March 1992 August 1992 | The internal processor clock runs at twice the clock rate of the external bus clock |
| i486DX-S (P4S) | 33 MHz; 50 MHz | 5 V or 3.3 V | 8 KB WT | June 1993 | SL Enhanced 486DX | |
 | i486DX2-S (P24S) | 40/20 MHz, 50/25 MHz, (66/33 MHz) | 5 V or 3.3 V | 8 KB WT | June 1993 | SL Enhanced 486DX2 |
 | i486SX-S (P23S) | 25, 33 MHz | 5 V or 3.3 V | 8 KB WT | June 1993 | SL Enhanced 486SX |
 | i486SX2 | 50/25, 66/33 MHz | 5 V | 8 KB WT | March 1994 | i486DX2 with the FPU disabled. Early version used the 800 nm process technology.[18] |
  | IntelDX4 (P24C) | 75/25, 100/33 MHz | 3.3 V | 16 KB WT | March 1994 | Designed to run at triple clock rate (not quadruple, as often believed; the DX3, which was meant to run at 2.5× the clock speed, was never released). DX4 models that featured write-back cache were identified by an "&EW" laser-etched into their top surface, while the write-through models were identified by "&E". |
 | i486DX2WB (P24D) | 50/25 MHz, 66/33 MHz | 5 V | 8 KB WB | October 1994 | Enabled write-back cache. |
 | IntelDX4WB | 100/33 MHz | 3.3 V | 16 KB WB | October 1994 | |
| i486DX2 (P24LM) | 90/30 MHz, 100/33 MHz | 2.5–2.9 V | 8 KB WT | 1994 | ||
 | i486GX | up to 33 MHz | 3.3 V | 8 KB WT | Embedded ultra-low-power CPU with all features of the i486SX and 16-bit external data bus. This CPU is for embedded battery-operated and hand-held applications. |
Processors compatible with the i486 were produced by companies such as IBM, Texas Instruments, AMD, Cyrix, UMC, and STMicroelectronics (formerly SGS-Thomson). Some were clones (identical at the microarchitectural level), others were clean room implementations of the Intel instruction set. (IBM's multiple-source requirement was one of the reasons behind its x86 manufacturing since the 80286.) The i486 was, however, covered by many Intel patents, including from the prior i386. Intel and IBM had broad cross-licenses of these patents, and AMD was granted rights to the relevant patents in the 1995 settlement of a lawsuit between the companies.[19]
AMD produced several clones using a 40 MHz bus (486DX-40, 486DX/2-80, and 486DX/4-120) which had no Intel equivalent, as well as a part specified for 90 MHz, using a 30 MHz external clock, that was sold only to OEMs. The fastest running i486-compatible CPU, the Am5x86, ran at 133 MHz and was released by AMD in 1995. 150 MHz and 160 MHz parts were planned but never officially released.
Cyrix made a variety of i486-compatible processors, positioned at the cost-sensitive desktop and low-power (laptop) markets. Unlike AMD's 486 clones, the Cyrix processors were the result of clean-room reverse engineering. Cyrix's early offerings included the 486DLC and 486SLC, two hybrid chips that plugged into 386DX or SX sockets respectively, and offered 1 KB of cache (versus 8 KB for the then-current Intel/AMD parts). Cyrix also made "real" 486 processors, which plugged into the i486's socket and offered 2 or 8 KB of cache. Clock-for-clock, the Cyrix-made chips were generally slower than their Intel/AMD equivalents, though later products with 8 KB caches were more competitive, albeit late to market.
The Motorola 68040, while not i486 compatible, was often positioned as its equivalent in features and performance. Clock-for-clock basis the Motorola 68040 could significantly outperform the Intel chip.[20][21] However, the i486 had the ability to be clocked significantly faster without overheating. Motorola 68040 performance lagged behind the later production i486 systems.[citation needed]
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Early i486-based computers were equipped with several ISA slots (using an emulated PC/AT-bus) and sometimes one or two 8-bit-only slots (compatible with the PC/XT-bus).[f] Many motherboards enabled overclocking of these from the default 6 or 8 MHz to perhaps 16.7 or 20 MHz (half the i486 bus clock) in several steps, often from within the BIOS setup. Especially older peripheral cards normally worked well at such speeds as they often used standard MSI chips instead of slower (at the time) custom VLSI designs. This could give significant performance gains (such as for old video cards moved from a 386 or 286 computer, for example). However, operation beyond 8 or 10 MHz could sometimes lead to stability problems, at least in systems equipped with SCSI or sound cards.
Some motherboards came equipped with a 32-bit EISA bus that was backward compatible with the ISA-standard. EISA offered attractive features such as increased bandwidth, extended addressing, IRQ sharing, and card configuration through software (rather than through jumpers, DIP switches, etc.) However, EISA cards were expensive and therefore mostly employed in servers and workstations. Consumer desktops often used the simpler, faster VESA Local Bus (VLB). Unfortunately prone to electrical and timing-based instability; typical consumer desktops had ISA slots combined with a single VLB slot for a video card. VLB was gradually replaced by PCI during the final years of the i486 period. Few Pentium class motherboards had VLB support as VLB was based directly on the i486 bus; much different from the P5 Pentium-bus. ISA persisted through the P5 Pentium generation and was not completely displaced by PCI until the Pentium III era, although ISA persisted well into the Pentium 4 era, especially among industrial PCs.
Late i486 boards were normally equipped with both PCI and ISA slots, and sometimes a single VLB slot. In this configuration, VLB or PCI throughput suffered depending on how buses were bridged. Initially, the VLB slot in these systems was usually fully compatible only with video cards (fitting as "VESA" stands for Video Electronics Standards Association); VLB-IDE, multi I/O, or SCSI cards could have problems on motherboards with PCI slots. The VL-Bus operated at the same clock speed as the i486-bus (basically a local bus) while the PCI bus also usually depended on the i486 clock but sometimes had a divider setting available via the BIOS. This could be set to 1/1 or 1/2, sometimes even 2/3 (for 50 MHz CPU clocks). Some motherboards limited the PCI clock to the specified maximum of 33 MHz and certain network cards depended on this frequency for correct bit-rates. The ISA clock was typically generated by a divider of the CPU/VLB/PCI clock.
One of the earliest complete systems to use the i486 chip was the Apricot VX FT, produced by British hardware manufacturer Apricot Computers.[22] Even overseas in the United States it was popularized as "The World's First 486".
Later i486 boards supported Plug-And-Play, a specification designed by Microsoft that began as a part of Windows 95 to make component installation easier for consumers.
The AMD Am5x86 and Cyrix Cx5x86 were the last i486 processors often used in late-generation i486 motherboards. They came with PCI slots and 72-pin SIMMs that were designed to run Windows 95, and also used for 80486 motherboards upgrades. While the Cyrix Cx5x86 faded when the Cyrix 6x86 took over, the AMD Am5x86 remained important given AMD K5 delays.
Computers based on the i486 remained popular through the late 1990s, serving as low-end processors for entry-level PCs. Production for traditional desktop and laptop systems ceased in 1998, when Intel introduced the Celeron brand, though it continued to be produced for embedded systems through the late 2000s.
In the general-purpose desktop computer role, i486-based machines remained in use into the early 2000s, especially as Windows 95 through 98 and Windows NT 4.0 were the last Microsoft operating systems to officially support i486-based systems.[23][24] Windows 2000 could run on a i486-based machine, although with a less than optimal performance, due to the minimum hardware requirement of a Pentium processor.[25] However, as they were overtaken by newer operating systems, i486 systems fell out of use except for backward compatibility with older programs (most notably games), especially given problems running on newer operating systems. However, DOSBox was available for later operating systems and provides emulation of the i486 instruction set, as well as full compatibility with most DOS-based programs.[26]
The i486 was eventually overtaken by the Pentium for personal computer applications, although Intel continued production for use in embedded systems. In May 2006, Intel announced that production of the i486 would stop at the end of September 2007.[2][27]
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