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From Wikipedia, the free encyclopedia
The MCST R1000 (Russian: МЦСТ R1000) is a 64-bit microprocessor developed by Moscow Center of SPARC Technologies (MCST) and fabricated by TSMC.[2]
![]() MCST R1000 FPGA prototype | |
General information | |
---|---|
Launched | 2010[1] |
Designed by | MCST |
Common manufacturer | |
Performance | |
Max. CPU clock rate | 750 MHz to 1 GHz |
FSB speeds | 2 Gbps |
Cache | |
L1 cache | 48 KB |
L2 cache | 2 MB |
Architecture and classification | |
Application | Embedded |
Technology node | 100 mm² |
Instruction set | SPARC V9 |
Physical specifications | |
Cores |
|
Package | |
History | |
Predecessor | MCST-R500S |
Successor | MCST-R2000 |
During development this microprocessor was designated as MCST-4R.[1]
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