ARM Cortex-X3

The ARM Cortex-X3 is the third generation X-series high-performance CPU core from Arm.^[1][2]

ARM Cortex-X3

General information
Launched	2022
Designed by	Arm
Performance
Max. CPU clock rate	3.3 GHz to 3.6 GHz
Address width	40-bit
Cache
L1 cache	128 KiB (64 KiB I-cache with parity, 64 KiB D-cache) per core
L2 cache	256–1024 KiB per core
L3 cache	512 KiB – 16 MiB (optional)
Architecture and classification
Microarchitecture	ARM Cortex-X3
Instruction set	ARMv9.0-A
Physical specifications
Cores	1–8 (per cluster)
Products, models, variants
Product code name	Makalu ELP
Variant	ARM Cortex-A715
History
Predecessor	ARM Cortex-X2
Successor	ARM Cortex-X4

It forms part of Arm's Total Compute Solutions 2022 (TCS22) along with Arm's Cortex-A715, Cortex-A510, Immortalis-G715 and CoreLink CI-700/NI-700.^[3]

Architecture changes in comparison with ARM Cortex-X2

The processor implements the following changes:^[4]

• Decode width: 6 (increased from 5)
• Rename / Dispatch width: 8
• micro-op (MOP) cache: 1.5k entries (reduced from 3k)
• Reorder buffer (ROB): 320 entries (increased from 288)
• Execution ports: 15
• Pipeline length: 9 (reduced from 10)

Performance claims:

• 25% peak performance improvement over the ARM Cortex-X2 in smartphones

(3.3GHz, 1MB L2, 8MB L3).^[5]

• 11% IPC uplift over the ARM Cortex-X2, when based on the same process,

clock speed, and cache setup (also known as ISO-process).^[2]

Usage

• Google • Tensor G3
• MediaTek • Dimensity 9200^[6]
• Qualcomm • Snapdragon 8 Gen 2^[7]

Architecture comparison

"Prime" core

uArch	Cortex-A78	Cortex-X1	Cortex-X2	Cortex-X3	Cortex-X4	Cortex-X925	Cortex-X930
Code name	Hercules	Hera	Matterhorn-ELP	Makalu-ELP	Hunter-ELP	Blackhawk	Travis
Architecture	ARMv8.2		ARMv9		ARMv9.2
Peak clock speed	~3.0 GHz			~3.3 GHz	~3.4 GHz	~3.8 GHz	~4.2 GHz
Decode width	4	5		6	10[8]	10
Dispatch	6/cycle	8/cycle			10/cycle
Max in-flight	2x 160	2x 224	2x 288	2x 320	2x 384	2x 768
L0 (Mops entries)	1536[9]	3072[9]		1536	0[8]
L1-I + L1-D	32+32 KiB	64+64 KiB		64+64 KiB		64+64 KiB
L2	128–512 KiB	0.25–1 MiB			0.5–2 MiB	2–3 MiB
L3	0–8 MiB[10]		0–16 MiB		0–32 MiB

See also

• ARM Cortex-A715, related high performance microarchitecture
• Comparison of ARMv8-A cores, ARMv8 family