PA-RISC
Instruction set architecture by Hewlett-Packard / From Wikipedia, the free encyclopedia
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Precision Architecture RISC (PA-RISC) or Hewlett Packard Precision Architecture (HP/PA or simply HPPA), is a general purpose computer instruction set architecture (ISA) developed by Hewlett-Packard from the 1980s until the 2000s.
Quick Facts Designer, Bits ...
Designer | Hewlett-Packard |
---|---|
Bits | 64-bit (32→64) |
Introduced | 1986 (1996 PA-RISC 2.0) |
Version | 2.0 (1996) |
Design | RISC |
Encoding | Fixed |
Branching | Compare and branch |
Endianness | Big |
Extensions | Multimedia Acceleration eXtensions (MAX), MAX-2 |
Open | No |
Successor | PA-WideWord → Itanium[1] |
Registers | |
General-purpose | 32 |
Floating point | 32 64-bit (16 64-bit in PA-RISC 1.0) |
Close
The architecture was introduced on 26 February 1986, when the HP 3000 Series 930 and HP 9000 Model 840 computers were launched featuring the first implementation, the TS1.[2][3] HP stopped selling PA-RISC-based HP 9000 systems at the end of 2008 but supported servers running PA-RISC chips until 2013.[4] PA-RISC was succeeded by the Itanium (originally IA-64) ISA, jointly developed by HP and Intel.[5]