arkitektur for mikroprocessorer From Wikipedia, the free encyclopedia
ARM, tidligere Advanced RISC Machines og endnu tidligere Acorn RISC Machine, er en RISC-mikroprocessorarkitektur. ARM-arkitekturen er den mest anvendte 32-bit-arkitektur efter antal producerede enheder.
For alternative betydninger, se arm (flertydig). (Se også artikler, som begynder med arm)
ARM-processoren var en af de første RISC-processorer og var fra starten kraftfuld; det var muligt at udføre en instruktion for hver anden klokcyklus. ARM-processoren har en særlig "ren" RISC-implementation og den anses for at være en af de mest elegante moderne mikroprocessorer. Den bliver anvendt i de udbredte ARM mikrocontrollere.
En af meddesignerne af ARM-arkitekturen er Steve Furber, som har fået en Britisk ærestitel. [1]
ARM1 og ARM2 var og er sikkert de mindste CPUer med 32 bit databus der findes. De blev udviklet i perioden 1984-1987. ARM1 og ARM2 har kun hhv. 25.000 og 30.000 transistorer,[2] hvilket er medvirkende til det særligt lave energiforbrug. Motorolas ældre 16/32-bit-processor 68000 har til sammenligning 68.000 transistorer.
ARM2 blev anvendt i Acorn Archimedes PCen, som kunne købes fra 1987.[2]
Intels xScale anvender ARM-arkitekturen.
| Arkitektur | Familie |
|---|---|
| ARMv1 | ARM1 |
| ARMv2 | ARM2, ARM3 |
| ARMv3 | ARM6, ARM7 |
| ARMv4 | StrongARM, ARM7TDMI, ARM9TDMI |
| ARMv5 | ARM7EJ, ARM9E, ARM10E, XScale |
| ARMv6 | ARM11, ARM Cortex-M |
| ARMv7 | ARM Cortex-A (fx Cortex-A9, Cortex-A15), ARM Cortex-M, ARM Cortex-R |
| ARMv8-R | Cortex-R__ (32 bit)[3][4] |
| ARMv8-A | Cortex-A53, Cortex-A57 (64 bit)[5] |
| Familie | Arkitektur version | Kerne | Egenskaber | Cache (I/D)/MMU | Typisk MIPS @ MHz | Anvendelser |
|---|---|---|---|---|---|---|
| ARM1 | ARMv1 | ARM1 | Ingen | ARM Evaluation System anden processor til BBC Micro | ||
| ARM2 | ARMv2 | ARM2 | Arkitektur 2 tilføjet MUL (multiplikation) instruktioner | Ingen | 4 MIPS @ 8 MHz 0,33 DMIPS/MHz |
Acorn Archimedes, Chessmachine |
| ARMv2a | ARM250 | Integreret MEMC (MMU), Grafik and IO processor. Arkitektur 2a tilføjet SWP og SWPB (swap) instruktioner. | Ingen, MEMC1a | 7 MIPS @ 12 MHz | Acorn Archimedes | |
| ARM3 | ARMv2a | ARM2a | Første anvendelse af en processor cache i ARM. | 4K samlet | 12 MIPS @ 25 MHz 0,50 DMIPS/MHz |
Acorn Archimedes |
| ARM6 | ARMv3 | ARM60 | v3 arkitektur første til at understøtte 32 bits hukommelsesadressering (tidligere 26 bits) | Ingen | 10 MIPS @ 12 MHz | 3DO Interactive Multiplayer, Zarlink GPS Receiver |
| ARM600 | Cache og coprocessor bus (til FPA10 floating-point unit). | 4K samlet | 28 MIPS @ 33 MHz | |||
| ARM610 | Cache, ingen coprocessor bus. | 4K samlet | 17 MIPS @ 20 MHz 0,65 DMIPS/MHz |
Acorn Risc PC 600, Apple Newton 100 series | ||
| ARM7 | ARMv3 | ARM700 | 8KB samlet | 40 MHz | Acorn Risc PC prototype CPU kort | |
| ARM710 | 8KB samlet | 40 MHz | Acorn Risc PC 700 | |||
| ARM710a | 8KB samlet | 40 MHz 0,68 DMIPS/MHz |
Acorn Risc PC 700, Apple eMate 300 | |||
| ARM7100 | Integreret SoC. | 8KB samlet | 18 MHz | Psion Series 5 | ||
| ARM7500 | Integreret SoC. | 4KB samlet | 40 MHz | Acorn A7000 | ||
| ARM7500FE | Integreret SoC. "FE" Tilføjet FPA og EDO hukommelseskontroller. | 4KB samlet | 56 MHz 0,73 DMIPS/MHz |
Acorn A7000+ | ||
| ARM7TDMI | ARMv4T | ARM7TDMI(-S) | 3-trins pipeline, Thumb-instruktioner[6] | none | 15 MIPS @ 16,8 MHz | Game Boy Advance, Nintendo DS, iPod, Lego NXT |
| ARM710T | 8KB samlet, MMU | 36 MIPS @ 40 MHz | Psion Series 5mx | |||
| ARM720T | 8KB samlet, MMU | 60 MIPS @ 59,8 MHz | Zipit Wireless Messenger | |||
| ARM740T | MPU | |||||
| ARMv5TEJ | ARM7EJ-S | Jazelle DBX, Forbedret DSP instruktioner, 5-trins pipeline | Ingen | |||
| StrongARM | ARMv4 | SA-110 | 16KB/16KB, MMU | 203 MHz 1,0 DMIPS/MHz |
Apple Newton 2x00 serie, Acorn Risc PC, Rebel/Corel Netwinder, Chalice CATS, Psion Netbook | |
| SA-1110 | 16KB/16KB, MMU | 233 MHz | LART, Intel Assabet, Ipaq H36x0, Balloon2, Zaurus SL-5x00 | |||
| ARM8 | ARMv4 | ARM810 | 5-trins pipeline, static branch prediction, double-bandwidth memory | 8 KB samlet, MMU | 84 MIPS @ 72 MHz 0,85 DMIPS/MHz |
Acorn Risc PC prototype CPU card |
| ARM9TDMI | ARMv4T | ARM9TDMI | 5-trins pipeline | Ingen | ||
| ARM920T | 16KB/16KB, MMU | 200 MIPS @ 180 MHz | Armadillo, GP32,GP2X (first core), Tapwave Zodiac (Motorola i. MX1), Hewlet Packard HP-49/50 lommeregnere, Sun SPOT, Samsung s3c2442 (HTC TyTN, FIC Neo1973[7]) | |||
| ARM922T | 8KB/8KB, MMU | |||||
| ARM940T | 4KB/4KB, MPU | GP2X (anden kerne) | ||||
| ARM9E | ARMv5TE | ARM946E-S | Forbedrede DSP instruktioner | variable, tightly coupled memories, MPU | Nintendo DS, Nokia N-Gage, Conexant 802.11 chips | |
| ARM966E-S | Ingen cache, TCMs |
ST Micro STR91xF, inkluderer Ethernet [8] | ||||
| ARM968E-S | Ingen cache, TCMs | |||||
| ARMv5TEJ | ARM926EJ-S | Jazelle DBX, Forbedret DSP instruktioner | variable, TCMs, MMU | 220 MIPS @ 200 MHz, | Mobiltelefoner: Sony Ericsson (K, W serie), Siemens og Benq (x65 serie og nyere), Texas Instruments OMAP1710, Qualcomm MSM6100, MSM6125, MSM6225, MSM6245, MSM6250, MSM6255A, MSM6260, MSM6275, MSM6280, MSM6300, MSM6500, MSM6800 | |
| ARMv5TE | ARM996HS[9][10][11] | Processor uden taktgiver, Forbedrede DSP instruktioner | Ingen cache, TCMs, MPU | |||
| ARM10E | ARMv5TE | ARM1020E | (VFP), 6-trins pipeline, Forbedrede DSP instruktioner | 32KB/32KB, MMU | ||
| ARM1022E | (VFP) | 16KB/16KB, MMU | ||||
| ARMv5TEJ | ARM1026EJ-S | Jazelle DBX, Forbedrede DSP instruktioner | variable, MMU or MPU | |||
| XScale | ARMv5TE | 80200/IOP310/IOP315 | I/O Processor, Forbedrede DSP instruktioner | |||
| 80219 | 400/600 MHz | Thecus N2100 | ||||
| IOP321 | 600 BogoMips @ 600 MHz | Iyonix | ||||
| IOP33x | ||||||
| IOP34x | 1-2 core, RAID Acceleration | 32K/32K L1, 512K L2, MMU | ||||
| PXA210/PXA250 | Applikationsprocessor, 7-trins pipeline | Zaurus SL-5600, iPAQ H3900 | ||||
| PXA255 | 32KB/32KB, MMU | 400 BogoMips @ 400 MHz | Gumstix, Palm Tungsten E2,Mentor Ranger & Stryder | |||
| PXA26x | Standard 400 MHz, op til 624 MHz | Palm Tungsten T3 | ||||
| PXA27x | Applikationsprocessor | 800 MIPS @ 624 MHz | HTC Universal, Zaurus SL-C1000, 3000, 3100, 3200, Dell Axim x30, x50, og x51 serien, Motorola Q, Balloon3, Trolltech Greenphone, Palm TX, Motorola Ezx Platform A728, A780, A910, A1200, E680, E680i, E680g, E690, E895, Rokr E2, Rokr E6, Fujitsu Siemens LOOX N560 | |||
| PXA800(E)F | ||||||
| Monahans | 1000 MIPS @ 1,25 GHz | |||||
| PXA900 | Blackberry 8700, Blackberry Pearl (8100) | |||||
| IXC1100 | Control Plane Processor | |||||
| IXP2400/IXP2800 | ||||||
| IXP2850 | ||||||
| IXP2325/IXP2350 | ||||||
| IXP42x | NSLU2 | |||||
| IXP460/IXP465 | ||||||
| ARM11 | ARMv6 | ARM1136J(F)-S | SIMD, Jazelle DBX, (VFP), 8-stage pipeline | variable, MMU | 740 @ 532-665 MHz (i.MX31 SoC), 400-528 MHz | Texas Instruments OMAP2420 (Nokia N95, Nokia N93), Zune, Nokia N800, Qualcomm MSM7200 (with integrated ARM926EJ-S Coprocessor@274MHz, used in HTC TyTN II (Kaiser), HTC Nike) |
| ARMv6T2 | ARM1156T2(F)-S | SIMD, Thumb-2[6], (VFP), 9-trins pipeline | variable, MPU | |||
| ARMv6KZ | ARM1176JZ(F)-S | SIMD, Jazelle DBX, (VFP) | variable, MMU+TrustZone[12] | Apple iPhone, Conexant CX2427X, Motorola RIZR Z8, Raspberry Pi | ||
| ARMv6K | ARM11 MPCore | 1-4 core SMP, SIMD, Jazelle DBX, (VFP) | variable, MMU | |||
| Cortex | ARMv7-A | Cortex-A8 | Application profile, VFP, NEON, Jazelle RCT, Thumb-2, 13-trins superskalar pipeline | variable (L1+L2), MMU+TrustZone | op til 2000 (2,0 DMIPS/MHz i hastighed fra 600 MHz til mere end 1 GHz) | Texas Instruments OMAP3 |
| Cortex-A9 | Application profile, (VFP), (NEON), Jazelle RCT and DBX, Thumb-2, Out-of-order speculative issue superscalar | MMU+TrustZone | 2,0 DMIPS/MHz | |||
| Cortex-A9 MPCore | As Cortex-A9, 1-4 core SMP | MMU+TrustZone | 2,0 DMIPS/MHz | |||
| ARMv7-R | Cortex-R4(F) | Embedded profile, (FPU) | variable cache, MPU optional | 600 DMIPS | Broadcom is a user | |
| ARMv7-M | Cortex-M3 | Microcontroller profile, kun Thumb-2. | Ingen cache, (MPU) | 125 DMIPS @ 100 MHz | Luminary Micro[13] mikrocontroller familie, ST Microelectronics STM32[14] | |
| ARMv6-M | Cortex-M1 | FPGA targeted, Microcontroller profile, Thumb-2 (BL, MRS, MSR, ISB, DSB, og DMB). | Ingen, tightly coupled memory optional. | Op til 136 DMIPS @ 170 MHz[15] (0.8 DMIPS/MHz[16], MHz achievable FPGA-dependent) | "Actel ProASIC3 and Actel Fusion PSC devices will sample in Q3 2007"[17] |
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