Functional verification
Stage of electronic circuit design validation / From Wikipedia, the free encyclopedia
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Functional verification is the task of verifying that the logic design conforms to specification.[1] Functional verification attempts to answer the question "Does this proposed design do what is intended?"[2] This is complex and takes the majority of time and effort (up to 70% of design and development time)[1] in most large electronic system design projects. Functional verification is a part of more encompassing design verification, which, besides functional verification, considers non-functional aspects like timing, layout and power.[3]