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来自维基百科,自由的百科全书
邏輯仿真(英語:logic simulation),或稱邏輯模擬,是對硬件描述語言所定義數字電路行為的預測與檢驗,通常可以利用計算機仿真實現。邏輯仿真可以在具有不同物理抽象層次(級別)下進行,例如晶體管級、邏輯門級、寄存器傳輸級和行為級。其基本原理是使用計算機軟件模擬一個激勵信號,然後觀察所設計電路的響應行為。[1]
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