M-sequenceMaximum length sequenceMLS、最大长度序列)是在基本的通信电路设计中,所经常被利用到的一个伪随机数字信号(Pseudo Random Sequence),其主要的方式是利用第一位与其他位寄存器的输出值做异或来设计其第一位寄存器的输入值。

参考文献

外部链接

  • Bristow-Johnson, Robert. A Little MLS Tutorial. [2013-12-14]. (原始内容存档于2020-09-29).—Short on-line tutorial describing how MLS is used to obtain the impulse response of a linear time-invariant system. Also describes how nonlinearities in the system can show up as spurious spikes in the apparent impulse response.
  • Hee, Jens. Impulse response measurement using MLS (PDF). [2013-12-14]. (原始内容存档 (PDF)于2019-08-19). —Paper describing MLS generation. Contains C-code for MLS generation using up to 18-tap-LFSRs and matching Hadamard transform for impulse response extraction.
  • Kerr, Wesley. Creation of M-Sequences. Geoffrey Aguirre Lab. University of Pennsylvania. [2013-12-14]. (原始内容存档于2020-05-09). ]
  • Linear Feedback Shift Registers. New Wave Instruments. 2005 [2013-12-14]. (原始内容存档于2018-10-01).—Properties of maximal length sequences, and comprehensive feedback tables for maximal lengths from 7 to 16,777,215 (3 to 24 stages), and partial tables for lengths up to 4,294,967,295 (25 to 32 stages).
  • Schäfer, Magnus. Aachen Impulse Response Database. Institute of Communication Systems and Data Processing, RWTH Aachen University. October 2012 [2013-12-14]. V1.4. (原始内容存档于2015-09-24). A(binaural)room impulse response database generated by means of maximum length sequences]
  • Efficient Shift Registers, LFSR Counters, and Long Pseudo-Random Sequence Generators—Obsolete (PDF). Xilinx. July 1996 [2013-12-14]. XAPP052 v1.1. (原始内容存档 (PDF)于2021-01-25).—Implementing lfsr's in FPGAs includes listing of taps for 3 to 168 bits

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