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Hardware Generation Language embedded in Scala / From Wikipedia, the free encyclopedia
Chisel is an open-source hardware description language (HDL)[15]. It is a set of special class definitions, predefined objects, and usage conventions within the scala programming language. Using these constructs a developer writes a Scala program that generates a hardware graph. These circuit generators leverage the hard work of design experts and raise the level of design abstraction for developers. To express flexible and scalable circuit construction, circuit generators must employ sophisticated programming techniques to make decisions concerning how to best customize their output circuits according to high-level parameter values and constraints.
Quick Facts Paradigms, Designed by ...
File:Chisel-logo.svg | |
Paradigms | HDL: Hardware, Type safety, Embedded domain-specific language |
---|---|
Designed by | Jonathan Bachrach, and others |
Developer | U.C. Berkeley |
First appeared | July 7, 2010; 14 years ago (2010-07-07) |
Stable release | |
Typing discipline | Inferred, linear, nominal, static, strong |
Implementation language | chisel |
Platform | ARM, IA-32, x86-64, MIPS, PowerPC, SPARC, RISC-V[2][3] |
OS | Linux, macOS, Windows, FreeBSD, OpenBSD,[4] Redox, Android, iOS[5] |
License | MIT or Apache 2.0[6] |
Filename extensions | .rs, .rlib |
Website | www |
Influenced by | |
Alef,[7] C#,[7] C++,[7] Cyclone,[7][8] Erlang,[7] Haskell,[7] Limbo,[7] Newsqueak,[7] OCaml,[7] Ruby,[7] Scheme,[7] Standard ML,[7] Swift[7][9] | |
Influenced | |
SpinalHDL, Elm,[10] Idris,[11] Spark,[12] Swift,[13] Project Verona[14] |
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